CT-12 COMPUTER
ARCHITECTUER
STRUCTURE No
of Hours(42)
1.
Introduction
to Computer Structure 3
2.
Computer
Arithmetic and Their Hardware Implementation 6
3.
Instruction
Set Architecture 5
4.
Introduction
to Computer Organization 6
5.
Micro
Sequencer & Micro Programmed Control Unit Design 4
6.
Memory
Organization 6
7.
Input/Output
Organization 5
8.
Advanced
Processor Architectures and Parallel Computers 7
1. Introduction to Computer Structure
1.1
Programmer’s
view of computer system
1.2
Hardware
designer’s view of computer system
1.3
Objectives
of computer architecture
1.4
Principles
in computer design
1.5
Computer
types
1.6
Computer
performance
2. Computer Arithmetic and Their Hardware
Implementation
2.1
Unsigned
notation arithmetic
2.2
Signed
notation arithmetic
2.3
BCD
arithmetic
2.4
Floating
point arithmetic
2.5
Design
of sequential 2’s complement circuit, Carry look ahead adder, Wallace tree
multiplier
3. Instruction Set Architecture
3.1
Instruction
set architecture design
3.2
Addressing
modes
3.3
Instruction
set & Instruction format
3.4
Working
of assembler and macro assembler
3.5
Stacks
& subroutines
4. Introduction to Computer Organization
4.1
Basic
computer organization
4.2
CPU
organization
4.3
Memory
subsystem organization & interfacing
4.4
I/O
subsystem organization & interfacing
4.5
Micro
operation & RTL
4.6
Implementation
of digital systems by using RTL
4.7
Design
of ALU
4.8
Design
of CPU
5. Micro Sequencer & Micro Programmed
Control Unit Design
5.1
Generic
micro instruction format
5.2
Basic
micro sequencer design
5.3
Design
of control unit horizontal & vertical micro code
5.4
Micro
subroutine
6. Memory Organization
6.1
Classification
of memory
6.2
Organization
of memory chips and memory interleaving
6.3
Hierarchical
memory system
6.4
Cache
memory & mapping techniques
6.5
Virtual
memory concept & its mapping techniques
6.6
Page
replacement policies
7. Input/Output Organization
7.1
Interfacing
of I/O devices
7.2
Program
control data transfer
7.3
Interrupt
controlled data transfer
7.4
DMA
based data transfer
7.5
Serial
and parallel data communication
7.6
RS-232-C
standard
8. Advanced Processor Architectures &
Parallel Computers
General
principles of governing the design of processor architecture and performance
enhancement strategies
RISC
and CISC processor
Instruction
pipelining in RISC
Delay
in pipeline execution
Super-scalar
processor
VLIW
and EPIC architecture
Parallelisms
in uni-processor
Classification
of parallel computers
Vector
computers and Array processor
Text Books
1.
Morris
Mano-Computer System Architecture-PHI, Eastern
Economy Edition-2001
2.
John
D.Carpinelli-Computer Systems Organization and
Architecture-Pearson Education Asia-1st Edition
Reference Books:
1. B Govindarajalu –
Computer Architecture and Organization-TMH-2006
2. J P Hayes- Computer Organization and
Architecture-MGH,3rd Edition